
Micrel, Inc.
KSZ8851-16MLLJ
March 2010
74
M9999-030210-1.0
PHY 1 Auto-Negotiation Link Partner Ability Register (0xEE – 0xEF): P1ANLPR
This register contains the auto-negotiation link partner ability for the chip function.
Bit
Default
R/W
Description
Bit is same as:
15
0
RO
Next page
Not supported.
14
0
RO
LP ACK
Not supported.
13
0
RO
Remote fault
Not supported.
12-11
0x0
RO
Reserved
10
0
RO
Pause
Link partner pause capability.
Bit 4 in P1SR
9
0
RO
Reserved.
8
0
RO
Adv 100 Full
Link partner 100 full capability.
Bit 3 in P1SR
7
0
RO
Adv 100 Half
Link partner 100 half capability.
Bit 2 in P1SR
6
0
RO
Adv 10 Full
Link partner 10 full capability.
Bit 1 in P1SR
5
0
RO
Adv 10 Half
Link partner 10 half capability.
Bit 0 in P1SR
4-0
0x01
RO
Reserved.
0xF0 – 0xF3: Reserved
Port 1 PHY Special Control/Status, LinkMD (0xF4 – 0xF5): P1SCLMD
This register contains the special control, status and LinkMD information of PHY1.
Bit
Default
R/W
Description
Bit is same as:
15
0
RO
Reserved
14-13
0x0
RO
Vct_result
VCT result.
[00] = normal condition.
[01] = open condition has been detected in cable.
[10] = short condition has been detected in cable.
[11] = cable diagnostic test is failed.
12
0
RW
(Self-Clear)
Vct_en
Vct enable.
1 = the cable diagnostic test is enabled. It is self-
cleared after the VCT test is done.
0 = it indicates the cable diagnostic test is
completed and the status information is valid for
read.